1. Field of the Invention
Embodiments of the present invention relate to a low noise amplifier, and more particularly, to a low noise amplifier for reducing third order intermodulation distortion.
2. Description of the Related Art
A radio frequency integrated circuit (RFIC), manufactured using a complementary metal-oxide semiconductor (CMOS) process, is generally considered to be inappropriate for communications requiring high linearity, such as code division multiple access (CDMA) communications, due to its relatively poor performance compared to a bipolar junction transistor (BJT). Recently, though, developments enabling gate lengths of MOS transistors to be reduced have resulted in lower prices of CMOS RFICs. Additionally, various topologies may be applied to CMOS RFICs to improve their performance. Thus, the market share of CMOS RFICs is increasing.
FIG. 1A is a circuit diagram illustrating a conventional amplifier implemented using a MOS transistor.
Referring to FIG. 1A, an input signal is provided to a gate terminal of MOS transistor MN, biased with a resistor Rs coupled to a power supply voltage Vs. An output signal generated by amplifying the input signal is output through a drain terminal of the MOS transistor MN.
FIG. 1B is a diagram illustrating frequency components of the output signal of the amplifier of FIG. 1A.
Referring to FIG. 1B, the output signal of the amplifier, which is generated by the MOS transistor MN having non-linear characteristics, has fundamental frequency components F1 and F2 and intermodulation distortion components 2F1-F2 and 2F2-F1. Signals corresponding to combinations of harmonic components of input signals having different frequencies F1 and F2 may occur while the non-linear MOS transistor MN processes RF signals. Third order intermodulation components 2F1-F2 and 2F2-F1 may be located near the fundamental intermodulation components F1 and F2. Therefore, the third order intermodulation components 2F1-F2 and 2F2-F1 are difficult to eliminate completely by filtering.
A derivative superposition method may be applied to a CMOS RFIC in CDMA communications to enhance linearity. The derivative superposition method has been devised to enhance linearity of an amplifier implemented with a metal-semiconductor field effect transistor (MESFET) or a hetero-structure field effect transistor (HEMT).
FIG. 2 is a circuit diagram illustrating a conventional low noise amplifier adopting a derivative superposition method.
Referring to FIG. 2, unlike the amplifier using a single transistor depicted in FIG. 1A, the amplifier adopting the derivative superposition method includes two transistors MN1 and MN2. Two different bias voltages, based on voltages V1 and V2, may be provided to the two transistors MN1 and MN2. A drain terminal of the transistor MN2 may be coupled to a drain terminal of the transistor MN1. Therefore, an output signal of the transistor MN2 is superposed on an output signal of the transistor MN1. The superposed output signal may be output through the drain terminals of the transistors MN1 and MN2.
The output signal includes two intermodulation distortion contribution components having opposite characteristics. Thus, intermodulation distortion may be reduced by superposing the two opposite intermodulation distortion contribution components. The amplifier in FIG. 2, however, does not have a function for implementing noise matching.
FIG. 3A is another conventional low amplifier adopting a derivative superposition method.
Referring to FIG. 3A, the amplifier in FIG. 3A includes two transistors MN1 and MN2, as in the conventional low amplifier in FIG. 2. Two different bias voltages based on voltages V1 and V2 may be provided to the two transistors MN1 and MN2. A drain terminal of the transistor MN2 may be coupled to a drain terminal of the transistor MN1. Therefore, an output signal of the transistor MN2 is superposed on an output signal of the transistor MN1. The superposed output signal may be output through drain terminals of the transistors MN1 and MN2. A degeneration inductor L1 may be coupled to source terminals of the transistors MN1 and MN2 for simultaneously realizing low noise and linear characteristics. In the amplifier of FIG. 3A, however, a second order harmonic component generated by the degeneration inductor L1 may cause intermodulation distortion, even though third order harmonic components may be reduced.
FIG. 3B is a vector diagram illustrating the intermodulation components included in the output signal of the low noise amplifier of FIG. 3A.
Referring to FIG. 3B, the output signal of the low noise amplifier includes third order harmonic components 310 and 330, and second order harmonic component 320. It is therefore very difficult to control a vector sum of the various harmonic components to equal zero.
Additionally, conventional amplifiers implementing the derivative superposition method are difficult to manufacture. The manufacturing difficulty may be caused, for example, by variations in the MOS process and the inability to use integrated chips (IC) having undesirable performance.